Student Project - Proof of Concept for JTAG driven DFT implementation
Job description
Student Project/Internship (6 months)
Proof of Concept for JTAG driven DFT implementation
Project Description
Current DFT (scan) implementation requires several external control pins that can be difficult to allocate in low pin count implementation. The addition of MBIST to the test mode introduce even more requirement for additional control pins to control test mode in an efficient way without using CPU core to handle this.
The goal of this internship is to test implementation of register controlled test mode management using a JTAG interface to write in the test registers. Define multiple test modes via JTAG and verify mode selection in simulations. Although JTAG introduces extra pins, but most of the designs contains a JTAG interface that can also be used for DFT test modes.
The project will be divided in the following steps:
Profile
We offer:
Internship Period is foreseen from: 1st February - 31st July
Professional requirements
What you should bring along:
Languages
Marin (Neuchatel)
Switzerland
Company address
EM Microelectronic-Marin Ltd
Rue des Sors 3
CH- Marin-Epagnier
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